Move ThreadContext to core/core.h and deal with the fallout

This commit is contained in:
Yuri Kunde Schlesner 2014-12-22 04:30:09 -02:00
parent d46f650036
commit 7b3452c730
18 changed files with 53 additions and 32 deletions

View File

@ -13,6 +13,7 @@
#include "core/core.h"
#include "common/break_points.h"
#include "common/symbols.h"
#include "core/arm/arm_interface.h"
#include "core/arm/skyeye_common/armdefs.h"
#include "core/arm/disassembler/arm_disasm.h"

View File

@ -7,7 +7,9 @@
#include "common/common.h"
#include "common/common_types.h"
#include "core/hle/svc.h"
namespace Core {
struct ThreadContext;
}
/// Generic ARM11 CPU interface
class ARM_Interface : NonCopyable {
@ -87,13 +89,13 @@ public:
* Saves the current CPU context
* @param ctx Thread context to save
*/
virtual void SaveContext(ThreadContext& ctx) = 0;
virtual void SaveContext(Core::ThreadContext& ctx) = 0;
/**
* Loads a CPU context
* @param ctx Thread context to load
*/
virtual void LoadContext(const ThreadContext& ctx) = 0;
virtual void LoadContext(const Core::ThreadContext& ctx) = 0;
/// Prepare core for thread reschedule (if needed to correctly handle state)
virtual void PrepareReschedule() = 0;

View File

@ -9,6 +9,7 @@
#include "core/arm/dyncom/arm_dyncom.h"
#include "core/arm/dyncom/arm_dyncom_interpreter.h"
#include "core/core.h"
#include "core/core_timing.h"
const static cpu_config_t s_arm11_cpu_info = {
@ -94,7 +95,7 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) {
AddTicks(ticks_executed);
}
void ARM_DynCom::SaveContext(ThreadContext& ctx) {
void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers));
memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers));
@ -110,7 +111,7 @@ void ARM_DynCom::SaveContext(ThreadContext& ctx) {
ctx.mode = state->NextInstr;
}
void ARM_DynCom::LoadContext(const ThreadContext& ctx) {
void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers));
memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers));

View File

@ -71,13 +71,13 @@ public:
* Saves the current CPU context
* @param ctx Thread context to save
*/
void SaveContext(ThreadContext& ctx) override;
void SaveContext(Core::ThreadContext& ctx) override;
/**
* Loads a CPU context
* @param ctx Thread context to load
*/
void LoadContext(const ThreadContext& ctx) override;
void LoadContext(const Core::ThreadContext& ctx) override;
/// Prepare core for thread reschedule (if needed to correctly handle state)
void PrepareReschedule() override;

View File

@ -4,6 +4,8 @@
#include "core/arm/interpreter/arm_interpreter.h"
#include "core/core.h"
const static cpu_config_t arm11_cpu_info = {
"armv6", "arm11", 0x0007b000, 0x0007f000, NONCACHE
};
@ -75,7 +77,7 @@ void ARM_Interpreter::ExecuteInstructions(int num_instructions) {
ARMul_Emulate32(state);
}
void ARM_Interpreter::SaveContext(ThreadContext& ctx) {
void ARM_Interpreter::SaveContext(Core::ThreadContext& ctx) {
memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers));
memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers));
@ -91,7 +93,7 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) {
ctx.mode = state->NextInstr;
}
void ARM_Interpreter::LoadContext(const ThreadContext& ctx) {
void ARM_Interpreter::LoadContext(const Core::ThreadContext& ctx) {
memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers));
memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers));

View File

@ -70,13 +70,13 @@ public:
* Saves the current CPU context
* @param ctx Thread context to save
*/
void SaveContext(ThreadContext& ctx) override;
void SaveContext(Core::ThreadContext& ctx) override;
/**
* Loads a CPU context
* @param ctx Thread context to load
*/
void LoadContext(const ThreadContext& ctx) override;
void LoadContext(const Core::ThreadContext& ctx) override;
/// Prepare core for thread reschedule (if needed to correctly handle state)
void PrepareReschedule() override;

View File

@ -8,6 +8,7 @@
#include "core/core_timing.h"
#include "core/settings.h"
#include "core/arm/arm_interface.h"
#include "core/arm/disassembler/arm_disasm.h"
#include "core/arm/interpreter/arm_interpreter.h"
#include "core/arm/dyncom/arm_dyncom.h"

View File

@ -4,8 +4,9 @@
#pragma once
#include "core/arm/arm_interface.h"
#include "core/arm/skyeye_common/armdefs.h"
#include "common/common_types.h"
class ARM_Interface;
////////////////////////////////////////////////////////////////////////////////////////////////////
@ -16,6 +17,21 @@ enum CPUCore {
CPU_OldInterpreter,
};
struct ThreadContext {
u32 cpu_registers[13];
u32 sp;
u32 lr;
u32 pc;
u32 cpsr;
u32 fpu_registers[32];
u32 fpscr;
u32 fpexc;
// These are not part of native ThreadContext, but needed by emu
u32 reg_15;
u32 mode;
};
extern ARM_Interface* g_app_core; ///< ARM11 application core
extern ARM_Interface* g_sys_core; ///< ARM11 system (OS) core

View File

@ -9,6 +9,8 @@
#include "common/chunk_file.h"
#include "common/log.h"
#include "core/arm/arm_interface.h"
#include "core/core.h"
#include "core/core_timing.h"

View File

@ -5,6 +5,8 @@
#pragma once
#include "common/common_types.h"
#include "core/arm/arm_interface.h"
#include "core/mem_map.h"
#include "core/hle/hle.h"

View File

@ -4,6 +4,7 @@
#include <vector>
#include "core/arm/arm_interface.h"
#include "core/mem_map.h"
#include "core/hle/hle.h"
#include "core/hle/kernel/thread.h"

View File

@ -4,6 +4,8 @@
#pragma once
#include <string>
#include "common/common_types.h"
#include "core/core.h"

View File

@ -6,6 +6,7 @@
#include "common/common.h"
#include "core/arm/arm_interface.h"
#include "core/core.h"
#include "core/hle/kernel/kernel.h"
#include "core/hle/kernel/thread.h"

View File

@ -10,6 +10,7 @@
#include "common/common.h"
#include "common/thread_queue_list.h"
#include "core/arm/arm_interface.h"
#include "core/core.h"
#include "core/core_timing.h"
#include "core/hle/hle.h"
@ -50,7 +51,7 @@ public:
return MakeResult<bool>(wait);
}
ThreadContext context;
Core::ThreadContext context;
u32 thread_id;
@ -104,18 +105,18 @@ inline void SetCurrentThread(Thread* t) {
}
/// Saves the current CPU context
void SaveContext(ThreadContext& ctx) {
void SaveContext(Core::ThreadContext& ctx) {
Core::g_app_core->SaveContext(ctx);
}
/// Loads a CPU context
void LoadContext(ThreadContext& ctx) {
void LoadContext(Core::ThreadContext& ctx) {
Core::g_app_core->LoadContext(ctx);
}
/// Resets a thread
void ResetThread(Thread* t, u32 arg, s32 lowest_priority) {
memset(&t->context, 0, sizeof(ThreadContext));
memset(&t->context, 0, sizeof(Core::ThreadContext));
t->context.cpu_registers[0] = arg;
t->context.pc = t->context.reg_15 = t->entry_point;

View File

@ -4,6 +4,7 @@
#include "common/log.h"
#include "core/arm/arm_interface.h"
#include "core/hle/hle.h"
#include "core/hle/kernel/event.h"
#include "core/hle/kernel/shared_memory.h"

View File

@ -7,6 +7,7 @@
#include "common/string_util.h"
#include "common/symbols.h"
#include "core/arm/arm_interface.h"
#include "core/mem_map.h"
#include "core/hle/kernel/address_arbiter.h"

View File

@ -20,21 +20,6 @@ struct PageInfo {
u32 flags;
};
struct ThreadContext {
u32 cpu_registers[13];
u32 sp;
u32 lr;
u32 pc;
u32 cpsr;
u32 fpu_registers[32];
u32 fpscr;
u32 fpexc;
// These are not part of native ThreadContext, but needed by emu
u32 reg_15;
u32 mode;
};
enum ResetType {
RESETTYPE_ONESHOT,
RESETTYPE_STICKY,

View File

@ -4,6 +4,8 @@
#include "common/common_types.h"
#include "core/arm/arm_interface.h"
#include "core/settings.h"
#include "core/core.h"
#include "core/mem_map.h"