diff --git a/src/core/arm/interpreter/arminit.cpp b/src/core/arm/interpreter/arminit.cpp
index 7254a16f3d..1d732fe847 100644
--- a/src/core/arm/interpreter/arminit.cpp
+++ b/src/core/arm/interpreter/arminit.cpp
@@ -139,16 +139,8 @@ void ARMul_Reset(ARMul_State* state)
     state->Bank = SVCBANK;
     FLUSHPIPE;
 
-    // Reset CP15
     ResetMPCoreCP15Registers(state);
 
-    // This is separate from the CP15 register reset function, as
-    // this isn't an ARM-defined reset value; it's set by the 3DS.
-    //
-    // TODO: Whenever TLS is implemented, this should contain
-    // the address of the 0x200-byte TLS
-    state->CP15[CP15_THREAD_URO] = Memory::KERNEL_MEMORY_VADDR;
-
     state->EndCondition = 0;
     state->ErrorCode = 0;
 
diff --git a/src/core/core.cpp b/src/core/core.cpp
index 15787bc17d..81e642318c 100644
--- a/src/core/core.cpp
+++ b/src/core/core.cpp
@@ -7,6 +7,7 @@
 #include "core/core.h"
 #include "core/core_timing.h"
 
+#include "core/mem_map.h"
 #include "core/settings.h"
 #include "core/arm/arm_interface.h"
 #include "core/arm/disassembler/arm_disasm.h"
@@ -59,6 +60,10 @@ int Init() {
     g_sys_core = new ARM_DynCom(USER32MODE);
     g_app_core = new ARM_DynCom(USER32MODE);
 
+    // TODO: Whenever TLS is implemented, this should contain
+    // the address of the 0x200-byte TLS
+    g_app_core->SetCP15Register(CP15_THREAD_URO, Memory::KERNEL_MEMORY_VADDR);
+
     LOG_DEBUG(Core, "Initialized OK");
     return 0;
 }